1. Field of the Invention
The present invention relates, in general, to semiconductor integrated circuits, and, more particularly, to a circuit for configuring input devices in an integrated circuit.
2. Relevant Background
In the production and manufacturing of different types of integrated circuits (ICs) it is desirable to have a single IC that can be packaged to operate with different interfaces. For example, a random access memory (RAM) may be configured as a "by-16" device or a "by-8" device. When configured as a by-16 device, the RAM receives sixteen data bits at sixteen data input/output (I/O) pins. These input data bits represent a single 16-bit word that is stored in the RAM at a location determined by address bits received at the address pins. In a by-8 device only eight bits of data are input to the RAM at one time.
For a given memory size (e.g., a 4 megabyte (MB) dynamic random access memory (DRAM)) much of the internal circuitry of a by-16 device can be identical to that of a by-8 device. However, the external control and data signals that are applied to the device differ between the two configurations. For example, a 4 MB by-16 device is typically packaged in a 40-pin plastic small outline J-lead (SOJ) or a 44-pin thin, small-outline package (TSOP) to provide an adequate number of pins for the 16-bit wide data bus. A 4 MB by-8 device, however, is typically packaged in a 28-pin SOG or 28-pin TSOP package. With respect to control signals, a by-16 device may require two column address strobe (CAS) signals or two write enable (WE) signals to separately activate columns in lower and upper memory banks within the chip. In contrast, a by-8 device uses a single CAS and WE signal, together with an additional address bit, to access data stored in both the upper and lower banks.
In spite of the great similarity between by-16 and by-8 devices from the standpoint of internal circuitry, most manufacturers must produce two separate IC designs to account for the different pin-outs and control signals. A by-16 device may be realized as an entirely different chip design and layout from the by-8 device, or the chips may differ only by customization of one or more metal layers. In either case, a particular chip must be committed to a by-8 or a by-16 design during the wafer fabrication process.
From a manufacturing efficiency standpoint, it is desirable to fabricate multiple device configurations using a single integrated circuit design. Not only is design time used more efficiently, but a single chip design simplifies scheduling and work flow in a wafer fabrication facility. Because the semiconductor fabrication process takes several weeks to process raw substrates into packaged electronic devices, a great deal of effort is placed in predicting customer orders so that finished goods are available when customers demand. For these reasons, it is desirable to be able to select the configuration of a semiconductor device as late as possible in the manufacturing process.
Many configurable circuits are available that allow the end-user to change the configuration after the manufacturing process is completed. Examples include field programmable gate arrays (FPGAs) and programmable logic devices (PLDs). However, these circuits tend to be cost prohibitive except for specialized applications. In cost sensitive markets such as exists for memory devices, user-configurable circuits are usually impractical. What is needed is a configurable input circuit that allows configuration to be chosen late in the manufacturing process, preferably during the assembly and packaging stages.
Semiconductor devices are manufactured to meet industry standards for functionality and performance. These standards dictate the packaging and pin-out configuration of most semiconductor devices. This standardization allows commodity devices supplied by one manufacturer to be substituted for those of another manufacturer. Any internal circuitry used to enable configurability must be implemented in a manner that allows compliance with industry standards, and does not adversely impact device functionality, performance and reliability.